Orthorectification that corrects the perspective distortion of remote sensing imagery, providing accurate geolocation and ease of correlation to other images is a valuable first-step in image processing for information extraction. However, the large amount of metadata and the floating-point matrix transformations required to operate on each pixel make this a computation and I/O (Input/Output) intensive process. As result much imagery is either left unprocessed or loses timesensitive value in the long processing cycle. However, the computation on each pixel can be reduced substantially by using computational results of the neighboring pixels and accelerated by special pipelined hardware architecture in one to two orders of magnitude. A specialized coprocessor that is implemented inside an FPGA (Field Programmable Gate Array) chip and surrounded by vendorsupported hardware IP (Intellectual Property) shares the computation workload with CPU through PCI-Express interface. The ultimate speed of one pixel per clock (125 MHz) is achieved by the pipelined systolic array architecture. The optimal partition between software and hardware, the timing profile among image I/O and computation, and the highly automated GUI (Graphical User Interface) that fully exploits this speed increase to maximize overall image production throughput will also be discussed. The software that runs on a workstation with the acceleration hardware orthorectifies 16 Megapixels per second, which is 16 times faster than without the hardware. It turns the production time from months to days. A real-life successful story of an imaging satellite company that adopted such workstations for their orthorectified imagery production will be presented. The potential candidacy of the image processing computation that can be accelerated more efficiently by the same approach will also be analyzed.
We consider a large-scale environment of turbulent reconnection that is fragmented into a number of randomly distributed unstable current sheets (UCSs), and we statistically analyze the acceleration of particles within this environment. We address two important cases of acceleration mechanisms when particles interact with the UCS: (a) electric field acceleration and (b) acceleration by reflection at contracting islands. Electrons and ions are accelerated very efficiently, attaining an energy distribution of power-law shape with an index 1-2, depending on the acceleration mechanism. The transport coefficients in energy space are estimated from test-particle simulation data, and we show that the classical Fokker-Planck (FP) equation fails to reproduce the simulation results when the transport coefficients are inserted into it and it is solved numerically. The cause for this failure is that the particles perform Levy flights in energy space, while the distributions of the energy increments exhibit power-law tails. We then use the fractional transport equation (FTE) derived by Isliker et al., whose parameters and the order of the fractional derivatives are inferred from the simulation data, and solving the FTE numerically, we show that the FTE successfully reproduces the kinetic energy distribution of the test particles. We discuss in detail the analysis of the simulation data and the criteria that allow one to judge the appropriateness of either an FTE or a classical FP equation as a transport model.
Flight Simulator X: Acceleration Fully Cracked Key Generator |WORK|
A Low-level radio-frequency (LLRF) control systems is required to regulate the rf field in the rf cavity used for beam acceleration. As the LLRF system is usually complex, testing of the basic functions or control algorithms of this system in real time and in advance of beam commissioning is strongly recommended. However, the equipment necessary to test the LLRF system, such as superconducting cavities and high-power rf sources, is very expensive; therefore, we have developed a field-programmable gate array (FPGA)-based cavity simulator as a substitute for real rf cavities. Digital models of the cavity and other rf systems are implemented in the FPGA. The main components include cavity baseband models for the fundamental and parasitic modes, a mechanical model of the Lorentz force detuning, and a model of the beam current. Furthermore, in our simulator, the disturbance model used to simulate the power-supply ripples and microphonics is also carefully considered. Based on the presented cavity simulator, we have established an LLRF system test bench that can be applied to different cavity operational conditions. The simulator performance has been verified by comparison with real cavities in KEK accelerators. In this paper, the development and implementation of this cavity simulator is presented first, and the LLRF test bench based on the presented simulator is constructed. The results are then compared with those for KEK accelerators. Finally, several LLRF applications of the cavity simulator are illustrated. 2ff7e9595c
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